CV, Curriculum Vitae and Online Resumes Search

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Online Resumes with "OVM"

Design Verification Expert

I have over 7 years of experience in design verification, SystemC/TLM modeling and eda tools development. I always strive for the success of the organization which I work. I got couple of awards during my career. I would like to carry forward the good work and contribut for the success of the group/oirganization.

Tags for this Online Resume: System Verilog, VMM, SystemC, C++, SVA, TLM, System Verilog,SV, VMM,OVM

Performed ASIC chip design and verification at component level as well as chip level using various HDLs like SystemVerilog and Verilog. Provided automation using Perl, Shell, Make scripting languages. Performed Coverage Driven Verification (CDV) and wrote

Looking forward to work as an ASIC design/verification engineer. In my professional experience of 2.5+ years, I've extensively worked on SystemVerilog and Verilog to perform verification of various standard protocols like SDIO, MMC, USB2.0, PCI, AHB AMBA, UART, I2C, Wishbone. Have developed Perl, Shell, Make scripts to provide automation. Also worked on various verification methodologies like OVM, VMM, AVM. I'd be glad to s...

Ideal Companies: Intel, AMD, Broadcom, NVidia, Qualcomm, Synopsys, Cadence, Freescale (basically any Semiconductor industry)

Tags for this Online Resume: ASIC design, ASIC Verification, SystemVerilog, Verilog, Perl, Shell, Makefile, Synthesis, Primetime, Design Compiler, USB2.0, AHB AMBA, PCI, SDIO, SPI, UART, C

vlsi verification engineer

vlsi verification engineer

Tags for this Online Resume: system verilog, verilog, c , ovm, perl,gdb,ddd

To work in a challenging environment, where I can effectively utilize my skills, knowledge, experience and potential towards the growth of the organization.

Professional Experience: Working as Member of Technical Staff at PW systems/Ichip Technologies, Hyderabad from Oct 2008 to till date. Worked as Verification Engineer at StellarIP Solutions, Hyderabad from Feb 2007 to Sep 2008. Got Cadence EDA tools Experience for Full Custom ASIC Design while doing Advanced PG Diploma in VLSI design in VEDANT, Chandigarh certified by Semiconductor Complex Ltd under Cadence Universi...

Ideal Companies: synopsys, cadence, AMD, Cisco, Wipro

Tags for this Online Resume: VLSI design Tools Simulation: ModelSim, Synopsys VCS, Cadence NC-Sim Implementation: Xilinx ISE 9.1i Tools: Specman, NC-Verilog, Vbuilder, Leonardo- Spectrum, ICFB (Spectre, Virtuoso, Assura), SOC Encounter, Co-ware Processor. Skills

Senior Level ASIC and FPGA chip design verification engineer - 20+ years experience OVM/UVM

I am seeking the ASIC or FPGA Design Verification Engineer position. I can offer extensive experience in Verilog, System Verilog or VHDL verification and design, OVM/UVM verification environments, synthesis, timing, and ATPG from start of concept to their release to physical design. I have built up OVM and SystemVerilog test environments from scratch. I have bus Interface skills in design, verification, and debug: SAS and ...

Tags for this Online Resume: Design, Verification, ASIC, OVM/UVM, SystemVerilog, FPGA, SAS/SATA

Technical Lead

Technical Lead having more than 7 years of ASIC Verification experience in specman/System Verilog / SystemC. Worked on 3 SoC verification projects.

Ideal Companies: Synopsys, Cadence, LSI, Infineon, Sasken, Wipro, HP

Tags for this Online Resume: VLSI, ASIC, Verification, Specman, System Verilog, VMM, OVM, UVM, eRM

Developer

Tags for this Online Resume: Verilog, System Verilog, OVM UVM, Verification, Semiconductor, FPGA, Veloce

Pre-Silicon Verification Engineer - 10 Years of Experience

To work in company where I can grow technically and personally.

Tags for this Online Resume: OVM, VMM, System Verilog, Post Silicon Validation, Linux Kernel, Pre Silicon Verification

Electrical Engineer - 3 Years of Experience - Near 77025

SUMMARY: * Knowledge of semiconductor device physics, process technology, and design rules. * Proven ability in hardware Design with Cadence (Virtuoso layout, OrCAD, VIP, Design IP) * Design & Verification with Verilog, system Verilog & OVM/UVM methodologies. * Proficient C, C++, python and MATLAB programming skills & Tools experience with Altera Quartus, Modelsim, Silvaco Virtual Wafer Fab, MATLAB, Proteas, LTspice, LINUX.

Tags for this Online Resume: FPGA, Programming, VERILOG, Asic, C Programming Language, C++ Programming Language, Cadence, Electronics, Embedded Systems, Matlab

Electrical Engineer - 1 Years of Experience - Willing to relocate anywhere

To secure a full-time position in the field of Electrical and Electronics Engineering allowing me to use my technical skills and abilities towards the growth of the organization while gaining valuable experience

Tags for this Online Resume: Altera, Autocad, Autodesk AutoCAD, C Programming Language, C++ Programming Language, Cadence, Code Analysis, Coding, Engineering, electrical, hardware, embedded, synopsys, VHDL, Verilog, System Verilog, Matlab, labVIEW, Python, Perl, OVM/UVM

System Administrator - 5 Years of Experience - Near 94566

Experienced with Solaris 11 and 10 LDOM and Solaris Zones. Experienced with VMware and Nutanix. * Collaborating with the developer engineer to debug the critical issue. * Developed Customers Import and Export Data via sftp and USB drives. * Coordinated to developer to debug patches. * Documented and Trained to the team. Lustre Principal Support Engineer/Sustaining Engineer * Testing Oracle X 86 Exadata Hardware/Software (HP...

Tags for this Online Resume: Infrastructure, Unix, Banyan, Novell, Novell Netware, Sun Solaris Operating System, System Administration, Systems Administrator, Desktop Computer, Diagnostics, html, java