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Online Resumes with "System Verilog"
I am a senior software professional with a broad range of experience including software engineering in a microprocessor design environment, algorithmically complex CAD tool development and academic research in artificial intelligence. I have strong analytical abilities with experience and expertise in algorithm development. I am looking for a technical staff position in a research and development environment such as one fi...
Ideal Companies: BBN Technologies, BAE Systems/AIT, BAE Systems, Charles River Analytics, The MITRE Corporation, Lincoln Laboratories, Draper Laboratory, Mitsubishi Electric Research Laboratories (MERL), Aptima, Scientific Systems Company Inc. (SSCI)
Tags for this Online Resume: algorithm development, data structures, optimization algorithms, graph algorithms, search algorithms, artificial intelligence, database applications, object orientation, C, Perl, Java, Sun Certified Programmer (J2SE 5.0), Specman e, System Verilog (reading knowledge), Verdi, Synopsys design compiler, Linux, Unix, shell scripts, Lisp, Prolog
Jaimin Ketan Desai 1028 Madsen Court, Pleasanton, CA 94588; email@example.com; 919-995-5947 Dear Representative, I am a recent graduate of Master of Science in Electrical Engineering from North Carolina State University Raleigh, NC. I am writing this letter to express my interest in Full-time job opportunity. My Major field of studies during my Master’s was VLSI, ASIC Design/Verification and Custom IC design. Where ...
To grow with a progressive company, which will allow me to utilize and enhance my talents in verification of new challenging technologies.
I have over 7 years of experience in design verification, SystemC/TLM modeling and eda tools development. I always strive for the success of the organization which I work. I got couple of awards during my career. I would like to carry forward the good work and contribut for the success of the group/oirganization.
To excel in the field of ASIC/SoC engineering and work in a challenging work environment and contribute positively to the growth of the technology industry.
Performed ASIC chip design and verification at component level as well as chip level using various HDLs like SystemVerilog and Verilog. Provided automation using Perl, Shell, Make scripting languages. Performed Coverage Driven Verification (CDV) and wrote
Looking forward to work as an ASIC design/verification engineer. In my professional experience of 2.5+ years, I've extensively worked on SystemVerilog and Verilog to perform verification of various standard protocols like SDIO, MMC, USB2.0, PCI, AHB AMBA, UART, I2C, Wishbone. Have developed Perl, Shell, Make scripts to provide automation. Also worked on various verification methodologies like OVM, VMM, AVM. I'd be glad to s...
vlsi verification engineer
Satish Chakkirala 1746 Ximeno Avenue, Apt # 5 Long Beach, CA - 90815 (714)-7944564 firstname.lastname@example.org OBJECTIVE An internship/full time position in the field of Electronics Engineering. Quest to work in a real professional environment, where I can enhance my skills and widen spectrum of knowledge. Also to make an indelible mark in the organization that i serve. Education •California State University Long beach...
Experienced in functional verification of large VLSI designs
Ideal Companies: Broadcom Intel EMC NetworkAppliance
To become ASIC Verification Engineer
To land a verification position using SystemVerilog.
To work in a challenging environment, where I can effectively utilize my skills, knowledge, experience and potential towards the growth of the organization.
Professional Experience: Working as Member of Technical Staff at PW systems/Ichip Technologies, Hyderabad from Oct 2008 to till date. Worked as Verification Engineer at StellarIP Solutions, Hyderabad from Feb 2007 to Sep 2008. Got Cadence EDA tools Experience for Full Custom ASIC Design while doing Advanced PG Diploma in VLSI design in VEDANT, Chandigarh certified by Semiconductor Complex Ltd under Cadence Universi...
Tags for this Online Resume: VLSI design Tools Simulation: ModelSim, Synopsys VCS, Cadence NC-Sim Implementation: Xilinx ISE 9.1i Tools: Specman, NC-Verilog, Vbuilder, Leonardo- Spectrum, ICFB (Spectre, Virtuoso, Assura), SOC Encounter, Co-ware Processor. Skills