CV, Curriculum Vitae and Online Resumes Search

---

Online Resumes with "System Verilog"

Hardware Design Engineer

Jaimin Ketan Desai 1028 Madsen Court, Pleasanton, CA 94588; jkdesai2@ncsu.edu; 919-995-5947 Dear Representative, I am a recent graduate of Master of Science in Electrical Engineering from North Carolina State University Raleigh, NC. I am writing this letter to express my interest in Full-time job opportunity. My Major field of studies during my Master’s was VLSI, ASIC Design/Verification and Custom IC design. Where ...

Sr. ASIC Verification Engineer

To grow with a progressive company, which will allow me to utilize and enhance my talents in verification of new challenging technologies.

Tags for this Online Resume: System Verilog, C/C++, PCI Express, AMBA Protocols, Low Power Verification - UPF, Scripting in Perl and Shell

Design Verification Expert

I have over 7 years of experience in design verification, SystemC/TLM modeling and eda tools development. I always strive for the success of the organization which I work. I got couple of awards during my career. I would like to carry forward the good work and contribut for the success of the group/oirganization.

Tags for this Online Resume: System Verilog, VMM, SystemC, C++, SVA, TLM, System Verilog,SV, VMM,OVM

ASIC/SoC design engineer

To excel in the field of ASIC/SoC engineering and work in a challenging work environment and contribute positively to the growth of the technology industry.

Tags for this Online Resume: ASIC design engineer, synopsys VCS, verilog HDL, System Verilog , SVA, C++, CADENCE , schematic entry, layout, PLL, USB, AMBA, system on chip design

Performed ASIC chip design and verification at component level as well as chip level using various HDLs like SystemVerilog and Verilog. Provided automation using Perl, Shell, Make scripting languages. Performed Coverage Driven Verification (CDV) and wrote

Looking forward to work as an ASIC design/verification engineer. In my professional experience of 2.5+ years, I've extensively worked on SystemVerilog and Verilog to perform verification of various standard protocols like SDIO, MMC, USB2.0, PCI, AHB AMBA, UART, I2C, Wishbone. Have developed Perl, Shell, Make scripts to provide automation. Also worked on various verification methodologies like OVM, VMM, AVM. I'd be glad to s...

Ideal Companies: Intel, AMD, Broadcom, NVidia, Qualcomm, Synopsys, Cadence, Freescale (basically any Semiconductor industry)

Tags for this Online Resume: ASIC design, ASIC Verification, SystemVerilog, Verilog, Perl, Shell, Makefile, Synthesis, Primetime, Design Compiler, USB2.0, AHB AMBA, PCI, SDIO, SPI, UART, C

vlsi verification engineer

vlsi verification engineer

Tags for this Online Resume: system verilog, verilog, c , ovm, perl,gdb,ddd

RESUME

Satish Chakkirala 1746 Ximeno Avenue, Apt # 5 Long Beach, CA - 90815 (714)-7944564 satish.0722@gmail.com OBJECTIVE An internship/full time position in the field of Electronics Engineering. Quest to work in a real professional environment, where I can enhance my skills and widen spectrum of knowledge. Also to make an indelible mark in the organization that i serve. Education •California State University Long beach...

VLSI Verification Expert

Experienced in functional verification of large VLSI designs

Ideal Companies: Broadcom Intel EMC NetworkAppliance

Tags for this Online Resume: Engineering, Development, Architecture, Verification, VLSI

Computer Engineer, San Jose

To become ASIC Verification Engineer

Tags for this Online Resume: Entry Level, ASIC, VERILOG, SYSTEM VERILOG

ASIC and FPGA Verification and Testbench Development engineer

To land a verification position using SystemVerilog.

To work in a challenging environment, where I can effectively utilize my skills, knowledge, experience and potential towards the growth of the organization.

Professional Experience: Working as Member of Technical Staff at PW systems/Ichip Technologies, Hyderabad from Oct 2008 to till date. Worked as Verification Engineer at StellarIP Solutions, Hyderabad from Feb 2007 to Sep 2008. Got Cadence EDA tools Experience for Full Custom ASIC Design while doing Advanced PG Diploma in VLSI design in VEDANT, Chandigarh certified by Semiconductor Complex Ltd under Cadence Universi...

Ideal Companies: synopsys, cadence, AMD, Cisco, Wipro

Tags for this Online Resume: VLSI design Tools Simulation: ModelSim, Synopsys VCS, Cadence NC-Sim Implementation: Xilinx ISE 9.1i Tools: Specman, NC-Verilog, Vbuilder, Leonardo- Spectrum, ICFB (Spectre, Virtuoso, Assura), SOC Encounter, Co-ware Processor. Skills