To work in a challenging environment, where I can effectively utilize my skills, knowledge, experience and potential towards the growth of the organization.

Professional Experience: Working as Member of Technical Staff at PW systems/Ichip Technologies, Hyderabad from Oct 2008 to till date. Worked as Verification Engineer at StellarIP Solutions, Hyderabad from Feb 2007 to Sep 2008. Got Cadence EDA tools Experience for Full Custom ASIC Design while doing Advanced PG Diploma in VLSI design in VEDANT, Chandigarh certified by Semiconductor Complex Ltd under Cadence University Program from July 2006 to Dec 2006. Professional Profile: A professional with 2.5+ as VLSI Experience. 2.1+ in ASIC Design & Verification. 6 Months as Industrial Trainee. Experience in development of eVCs in Compliance to eRM. Working experience with Verilog, System Verilog Assertions. Specialized in Specman (e-language) and Systemverilog. Experience in URM methodology, eRM methodology, OVM methodology Working experience on OCP, APB bus protocols and SPI. Experience in developing firmware for processor. Experience in Verifying the Instruction Set Architecture of Processor. Conceptual knowledge of C and C++.

Computer Hardware Engineer