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Online Resumes with "Model Sim"
Masters graduate from Syracuse University looking for job in field of ASIC/FPGA Design
I am looking for an entry level position in the field of ASIC/FPGA Design.
Ideal Companies: Intel, IBM, AMD, Qualcomm, WD, SUN Microsystems, LSI, National Semiconductors, Freescale, Maxim-IC
Tags for this Online Resume: ASIC, FPGA, VHDL, Verilog, CADENCE, ModelSim
resume
Zhengdong Fan 1215 E Vista Del Cerro, APT2022, Tempe, US, AZ, 85281 480-334-6886 zfan6@asu.edu Objective Look for Full Time Job related with: Analog/RF,Digital, Mix-signal IC design, application, analysis or product Education M.S.E of Engineering in Electrical Engineering of Arizona State University (ASU), Tempe,AZ Specialty area: Electronic and Mixed Signal Circuits May.2010 GPA 3.32 B.E. in Electronic...
Electrical Engineer Entry Level
Ideal Companies: CISCO, Intel, IBM, etc.
Tags for this Online Resume: MySQL, C, Java, HTML, XML, Windows, Unix, Solaris, Linux, FPGA, VHDL, Verilog, Assembly, ASIC, PCB, Circuit Design, ASM, PSpice, MATLAB, Xilinx, ModelSim, Altela, Code Vision AVR, VNC, Spartan-3 Platform FPGAs, PCuLAB Board, Atmel SK500 Board, Allegro Micro System Board, Digital Oscilloscope, Digital Logic Analyzer, Multi-meter, Power Station, SQL, PL / SQL, Perl, Scripting, Quality Center, Quick Test Professional, Mercury Test Director, Mercury WinRunner, Load Runner, Rational Unified Process, Rational Test Manager, Rational Robot, Rational Clear Quest, Rational Rose, Oracle, MS Access, Toad, SAP R/3 GUI, ERP, Pro Engineer, Rhinoceros, AutoCAD, Adobe Photoshop, MS Word, Excel, Power Point, Outlook, DOS, Macintosh, Cantonese, Mandarin, English
Highly Motivated Electrical Engineer
My ideal job is one that allows me to be a self-starter within a motivated team environment. I see myself working in the field of systems management where real-time engineering support, data trending, system health checks, and development and maintenance of operational procedures are just a part of my daily tasks. Initially, the job would entail specialized training of the environment provided by seasoned professionals, as ...
Ideal Companies: Engineering/Technology/Research Sciences, Aviation/Aerospace, Biotechnology, Defense/Government, and/or Energy/Utilities
Tags for this Online Resume: Unix, Linux, Windows, C/C#, VHDL, Matlab, Xilinx, ModelSim, Labview, SPICE, MS Word, MS Power Point, MS Excel, Adobe InDesign, Microprocessors/Embedded Systems, Feedback Control Systems, Instrumentation, Signals / Systems, Computer Architecture, Electromagnetic Fields / Waves, Electronics I / II, Circuit Analysis I / II, Computer Logic Design
To work in a challenging environment, where I can effectively utilize my skills, knowledge, experience and potential towards the growth of the organization.
Professional Experience: Working as Member of Technical Staff at PW systems/Ichip Technologies, Hyderabad from Oct 2008 to till date. Worked as Verification Engineer at StellarIP Solutions, Hyderabad from Feb 2007 to Sep 2008. Got Cadence EDA tools Experience for Full Custom ASIC Design while doing Advanced PG Diploma in VLSI design in VEDANT, Chandigarh certified by Semiconductor Complex Ltd under Cadence Universi...
Ideal Companies: synopsys, cadence, AMD, Cisco, Wipro
Tags for this Online Resume: VLSI design Tools Simulation: ModelSim, Synopsys VCS, Cadence NC-Sim Implementation: Xilinx ISE 9.1i Tools: Specman, NC-Verilog, Vbuilder, Leonardo- Spectrum, ICFB (Spectre, Virtuoso, Assura), SOC Encounter, Co-ware Processor. Skills
Design Engr, FPGA, VHDL, Verilog, PCI, SPI, Xilinx Memory Controller, CCA design
I would like continue designing FPGA, running simulation, writing Verilog and VHDL using IP cores as well as high speed controlled impedance CCAs. I would like to encounter with new challenge. I am self motivated engineer educating myself new tools, programming language and technology.
Tags for this Online Resume: FPGA, Xilinx, Altera, processor, VHDL/Verilog/testbench, Simulation, ModelSim, Synthesize/Place and Route, PCI, SPI, Schematic Capture, ChipScope, CCA
Research Assistant (Intern) - NYU Langone Medical Center, NY
Tags for this Online Resume: MATLAB, IDL, JavaScript, C, C++, Assembly Language, ImageJ, CodeWarrior IDE, CCStudio IDE, Xilinx ISE, ModelSim, OpenCV
Senior Engineer with 8+ yrs of experience in FPGA design, verification using Xilinx, Altera Quartus, ModelSim, VHDL, Verilog
FPGA Design using Xilinx, Altera Quartus, ModelSim, VHDL, Verilog. Having experience in wireless domain over WiMAX and 3GPP LTE.
