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Online Resumes with "20 years "
Senior Level ASIC and FPGA chip design verification engineer - 20+ years experience OVM/UVM
I am seeking the ASIC or FPGA Design Verification Engineer position. I can offer extensive experience in Verilog, System Verilog or VHDL verification and design, OVM/UVM verification environments, synthesis, timing, and ATPG from start of concept to their release to physical design. I have built up OVM and SystemVerilog test environments from scratch. I have bus Interface skills in design, verification, and debug: SAS and ...
Tags for this Online Resume: Design, Verification, ASIC, OVM/UVM, SystemVerilog, FPGA, SAS/SATA
QA Director, R&D Manager
To find a company that can utilize my 20 + years experiance, knowledge and work ethics to better both my employer and myself.
Tags for this Online Resume: Research & Development, Quality Assurance, Director, Managment, Bakery, Food Service
