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Online Resumes with "place route"
Physical Design Engineer (place and route)
Ideal Companies: Any company
Tags for this Online Resume: cadence, first encounter, soce
physical design
physical design, place and route
Ideal Companies: no
Mask Design Consultant with 12 years experience looking to help get your jobs done.
I'm looking to do mask design work using Cadence Virtuoso drawing tools and Calibre or Hercules verification of DRC and LVS. I have excellent experience in both analog and digital environments.
Ideal Companies: Any Semiconductor company
Tags for this Online Resume: Cadence, Virtuoso, Calibre, Hercules, Experienced, Unix, DRC, LVS
Research Assistant, Integrated Circuit and System Track
To get the chance of having a full time position
Tags for this Online Resume: Perl/C, Cadence, Virtuso, ENCOUNTER for auto Place and Routing, Verilog, VHDL, Matlab, DC_shell, •Labview•Primetime static Timing analyzer •
Senior Logic Designer
Ideal Companies: Trident Sigma Apple
Tags for this Online Resume: Logic Design, Verilog, ASIC, CPU Design, Computer architecture, HDL
Design Engr, FPGA, VHDL, Verilog, PCI, SPI, Xilinx Memory Controller, CCA design
I would like continue designing FPGA, running simulation, writing Verilog and VHDL using IP cores as well as high speed controlled impedance CCAs. I would like to encounter with new challenge. I am self motivated engineer educating myself new tools, programming language and technology.
Tags for this Online Resume: FPGA, Xilinx, Altera, processor, VHDL/Verilog/testbench, Simulation, ModelSim, Synthesize/Place and Route, PCI, SPI, Schematic Capture, ChipScope, CCA
Vp of Sales for emerging EDA Technology Companies
I am currently consulting for TAKUMI Technology and other EDA companies. While consulting, I am searching for a full time Job. I am able to travel over 50% and can cover a wide geographical area.
Ideal Companies: Technology Based companies such as Electronic Design Automation etc... I will consider Industries out side of EDA
Tags for this Online Resume: Place and Route, GDSII, IP, Simulation, Verification, Asic Design Services, Analog/Mixed Signal
Semiconductor design tool program manager
Manage all aspects of semiconductor VLSI design tools for a large scale technology company.
Tags for this Online Resume: VLSI, Management, CDL, Place and Route, IC Layout Design, Transportation
Field Service Rep, System Engineer or Manager in Dallas Metro
Senior contributor or Manager position with challenging position that will utilize my knowledge, experience and education.
Ideal Companies: Mantech International, Agility (L3), L3, Leidos (SAIC), Sotera (GDIT), verizon
Tags for this Online Resume: DCGS-A FSR, Security, Server, Six Sigma Specialist, VMVsphere, Red Hat, SQL, Windows Server, Top Secret/SCI
Component Design Engineer - 3 years experience - Intel, Folsom
I am a design engineer who has 3 years of work experience in Hardware Design-functional verification, static timing analysis, floor planning, Place and Route, design optimization, power and noise analysis, circuit quality, register file array and data path block closure flows, custom bottom up register file build
Engineer
Tags for this Online Resume: analog, digital, place and route, ICC, Cadence, Chip Verification, Magma Talus, Debugging, Documentation, calibre
Electronics Engineer - 9 Years of Experience - Near 78732
SUMMARY •US permanent resident fully authorized to work in the US (Green Card, EB-11) •PhD in Electronic Engineering from The University of Tokyo in Japan and Xi’an Jiaotong University •10 years hardware and chips experience including the development of video and image processing/monitoring chips, Closed loop trajectory correction system chips based on real time graph and image feedback, Video codec development based on H....
Tags for this Online Resume: Asic, Wireless, Hardware/Systems, DRAM, VERILOG, Video, ASIC Design, CIO, Diversity, Scheduling, Java, Python, ZigBee, Bluetooth, IoT