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Online Resumes with "Verilog VHDL"
Senior electronic/fpga engineer - Verilog, VHDL, board level, system level, verifacation
Some management experiance but prefer hands on design.
Tags for this Online Resume: FPGA, VHDL, Verilog, Hardware, Memory, Microprocessor
Sr. ASIC-DFT Design Engineer
Verilog/VHDL, RTL design, logic synthesis/DFT-insert, test-compression, boundary scan, MBIST, SAF/TDF patterns generation, and DFT verification.
Tags for this Online Resume: ASIC , RTL, Physical Design, DFT, Synthesis, Digital
Research Assistant, Integrated Circuit and System Track
To get the chance of having a full time position
Tags for this Online Resume: Perl/C, Cadence, Virtuso, ENCOUNTER for auto Place and Routing, Verilog, VHDL, Matlab, DC_shell, •Labview•Primetime static Timing analyzer •
VLSI/ASIC hardware design - Verilog/VHDL-C/C++-Schematic/Layout
Become a qualified hardware engineer in VLSI/ASIC design area. Develop the innovative technology to improve people's life
Tags for this Online Resume: ASIC, VLSI, Verilog HDL, VHDL, C/C++, Schematic, layout, ATPG
Entry Level Computer Engineer , C/C++,LABVIEW7.1,8.1,8.6, Fortran, Verilog, VHDL, Assembly language
Entry Level Computer Engineer , C/C++,LABVIEW7.1,8.1,8.6, Fortran, Verilog, VHDL, Assembly language
Tags for this Online Resume: c/ c++, Verilog, VHDL, Labview, Matlab, Linux,Unix, Assembly Language
Digital Design Engineer - Verilog, VHDL, C/C++
To apply software development experience honed through parallel programming tasks on clustered UNIX machines. To leverage previous work with FPGA programming; including RTOS applications and encrypted communications over an Ethernet interface. To provide knowledge of hardware description languages for gate level circuit design and synthesis.
Tags for this Online Resume: Verilog, C, hardware, Python
Electrical Engineer
I am looking for the challenging job which includes any of the coding skills such as Verilog or VHDL, FPGA programming, C programming, Digital design or Synthesizing the RTL code etc.
Ideal Companies: Intel, Broadcom, Qualcomm
Tags for this Online Resume: Verilog, VHDL, synthesis, C, FPGA, Synopsys
RESUME
Satish Chakkirala 1746 Ximeno Avenue, Apt # 5 Long Beach, CA - 90815 (714)-7944564 satish.0722@gmail.com OBJECTIVE An internship/full time position in the field of Electronics Engineering. Quest to work in a real professional environment, where I can enhance my skills and widen spectrum of knowledge. Also to make an indelible mark in the organization that i serve. Education •California State University Long beach...
Design Engr, FPGA, VHDL, Verilog, PCI, SPI, Xilinx Memory Controller, CCA design
I would like continue designing FPGA, running simulation, writing Verilog and VHDL using IP cores as well as high speed controlled impedance CCAs. I would like to encounter with new challenge. I am self motivated engineer educating myself new tools, programming language and technology.
Tags for this Online Resume: FPGA, Xilinx, Altera, processor, VHDL/Verilog/testbench, Simulation, ModelSim, Synthesize/Place and Route, PCI, SPI, Schematic Capture, ChipScope, CCA
Aerospace Engineer
Objective: Seeking an entry-level hardware design, verification, validation position that offers career advancement and personal growth Summary 7 years of learning hardware technology. Excellent knowledge of VLSI design/testing/verification and Verilog/VHDL language. Rigorous academic studies as well as extensive project experience in Object Oriented Programming, Data Structures, Algorithms. Self-motivated, passiona...
Senior Level ASIC and FPGA chip design verification engineer - 20+ years experience OVM/UVM
I am seeking the ASIC or FPGA Design Verification Engineer position. I can offer extensive experience in Verilog, System Verilog or VHDL verification and design, OVM/UVM verification environments, synthesis, timing, and ATPG from start of concept to their release to physical design. I have built up OVM and SystemVerilog test environments from scratch. I have bus Interface skills in design, verification, and debug: SAS and ...
Tags for this Online Resume: Design, Verification, ASIC, OVM/UVM, SystemVerilog, FPGA, SAS/SATA
Senior R&D ECE - 12 years experience - Verilog/VHDL - Verification - Mixed Signal
Team lead for a micro electronics design group.
Tags for this Online Resume: VHDL, Verilog, Mixed Signal, Design, Verification, Hardware
