Alice Chen
OBJECTIVE Software QA Engineer Position
SUMMARY
• Proficient in automation script, regression test, interactive test, test plan and test cases.
• Professional programming skill in OOP, C/C++, Assembler and Shell programming.
• Expertise in real-time OS, Linux, UNIX, DOS and MSW.
• Experienced with software debugger tools and hardware emulators.
• Self motivated, quick learner, strong communication & analytical...
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C / C++, SQL, Perl, SAS, Selenium, Silk, Cucumber
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Accounting, Certified Public Accountant, Clarify, Deductions, Documentation, German Language, Microsoft, Microsoft Excel, sheets, Tax Preparation, Vendor Invoices
- Actively seeking full-time job opportunities in business/data analytics, process improvement or supply chain management.
- A quick learner, an accountable team player and responsive leadership.
- Strong techniques in Data Analytics and Visualization (Excel, SQL, R, Python, Tableau), Relational Database (MS Access, MySQL), Machine Learning, Lean Six Sigma and Operations Research.
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Logistics, Apache Hadoop, Autocad, Black belt, C++ Programming Language, Clustering, New York, Python, Data Analytics, Six Sigma, Improvement, Operations Research, Analyst, Database, Data Mining, Machine Learning, MySQL, SQL, Tableau, Hive, Pig, R, MATLAB, Forecasting, Statistics, Excel, Word, PowerPoint
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Cancer, Oncology, Genotyping, Research, Cardiovascular, General Surgery, Obstetrics, Pathology, Pediatrics, Radiology
Profile: Experience in * Fullchip backend design integration, management, * Chip level edit, floor plaining and tapeout. * Analog and digital customer layout. * I/O PAD, memory full custom layout design including floor planning. * Has the certificate of the Cadence First and SOC Encounter * Using Laker tool generate the sub block automatically, and it's DRC and LVS. * Physical design, LVS, DRC and RC extraction and verifica...
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Layout, Management, Planning, Tape-out, Asic, Chip Design, Multimedia, CAD Tools, Cadence, Chip Verification
Profile: Experience in * Fullchip backend design integration, management, * Chip level edit, floor plaining and tapeout. * Analog and digital customer layout. * I/O PAD, memory full custom layout design including floor planning. * Has the certificate of the Cadence First and SOC Encounter * Using Laker tool generate the sub block automatically, and it's DRC and LVS. * Physical design, LVS, DRC and RC extraction and verifica...
Tags for this Online Resume:
Layout, Management, Planning, Asic, Chip Design, Multimedia, Tape-out, CAD Tools, Cadence, Chip Verification
Twenty-one years of industrial experience: o Over eleven years (11+) in experimental and numerical structural analyses for supporting product development and optimization as a Sr. test engineer at an internal consulting department & KNOWLEDGE/SKILLS - Emerson Climate Technologies
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Consulting, Instrumentation, GE, ANSYS, CNC, Coding, Data Analysis, Electronics, Failure Analysis, Manufacturing
