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Online Resumes with "PERL tcl"



Software Engineer - more than 15 years experience -Strong C++, Java object-oriented programming Proficient Python, Perl, TCL scripting languages

I'm highly dependable Software Developer dedicated to constantly improving tools and infrastructure to maximize productivity, minimize system downtime and quickly respond to the changing needs of the business.

Tags for this Online Resume: C++, Java, Python, Javascript, HTML, CSS

System Engineer - 9 Years of Experience

Experience Summary: * More than ten years of experience in Software analysis, design, development, testing, system administration, project management, implementation, support, training and trouble shooting * Strong expertise in design and development of applications using C, C++, Java, J2EE, JSP, Servlets, JDBC, EJB, XML, XPath XSLT, XSD, DOM WebLogic 7.0, 8.1, WebSphere 4.5, PowerBuilder 6.0 and PERL * Strong expertise in ...

Tags for this Online Resume: Structured Query Language, Data General Eclipse, Eclipse, Linux, Redhat, SUSE, SuSE Linux, ANT, Apache Ant, BEA WebLogic

Application Support

Summary Experience with Healthcare Integration for over 20 years as an Integration Analyst working with multiple sites in a remote capacity and on-site. Expertise includes, HL7, XML, ICD-10, and ACA related to integration. Project Management and delegation of work. Migration and transition between interface engine platforms. Active training and mentoring of junior team members, site analysts, and other associates. Legacy su...

Tags for this Online Resume: Clinicals, Financials, Health Level 7, Scheduling, Datagate, Documentation, Ecl (Control Lang), Egate, Extensible Markup Language (XML), Integrate

Software Engineer - 3 Years of Experience - Near 80014

PROFESSIONAL SUMMARY * 2 Years of Experience as Hardware Design Engineer / Telecommunication Engineer. * Master's degree in Electrical Engineering, major in communication systems. * Experience with Analog/mixed-signal circuit concepts and techniques used in wireless transceiver ICs. (e.g. LNAs, Mixer, PGA, Filters, ADC/DAC, PLLs, Oscillators, VCOs, CMOS PA). * Proficiency in Digital Electronics Design, FPGA Architecture, RT...

Tags for this Online Resume: Matlab, Architectural, Circuit Design, CMOS, Hardware Design, Hardware/Systems, Integrate, Layout, SAS, Schematics

Featured Profile

ASIC/SoC/FPGA Digital Design and Verification Engineer - 2 Years of Experience in ASIC Design and 1 Year experience in Verification Domain- Near 95825

Seeking Full-Time/Internship in ASIC/SoC Design Verification/Validation/FPGA. Two years hands on Experience in RTL design and 1 year experience in Verification, including RTL Design, Verilog HDL/ System Verilog, UVM, Code Coverage, Static Timing Analysis (STA), Functional Coverage, Assertions.

Ideal Companies: Intel, Synopsys, Xilinx, NXP, ASIC North, Segate, Mentor Graphics, Ericssion, Qlogic, Marvell, Qualcomm, Nvidia, RADIANSYS, EncoreSemi, Cirrus Logic, ARM, IBM, HCL, Amiga Infotech, L&T, CISCO, Synaptics, AMD, Broadcomm, CTG, Ambrella, Micron, Microchip, Cybercoders, OSI Semiconductors, Google, Microsoft, Facebook, Western Digital, Global Foundries, jma wIRELESS

Tags for this Online Resume: C++ Programming Language, Cadence, Coding, Compiler, Cyclic Redundancy Code (CRC), FPGA, Graphic Design, Linux, Matlab, SoC, CDC, UVM, Code Coverage, Functional Coverage, System Verilog Assertions (SVA), RTL, CMOS, System Verilog, Self checking, Constrained random teatbench, Direct Testbench, Xilinx Spartan 3E FPGA, PERL/ tcl, : Linux, Unix, Windows, Mac, DVS Protocol, MESI Protocol, UART, SPI, DDR, PCI, PCIe(Begineer), Concept of Pipeline and Hazards, Addressing Mode, Cache, Cache Mapping, Virtual Memory, Paging, DMA, ASIC, Synopsys VCS, QuestaSim, ModelSim Simulator Mentor Graphics, Cadence Virtuoso, Design Compiler, Cadence Pspice, Xilinx ISE, Simulink, EDA Playground, C++, Object Oriented Programming, LVS, DRC