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Online Resumes with "Deep Sub Micron"
Sr Physical Design Engineer
Work on the challenging issues of UDSM (Ultra Deep Sub Micron) Physical Design in SoC environment.
ASIC/SoC Design/Verif Engineer - 4 Years of Experience - Bay Area
To become an accomplished front-end VLSI engineer with deep expertise in micro-architecture, design and verification of SoCs (System on Chip) and develop a broad technical background in DSM (Deep Sub-Micron) VLSI methodologies.
Tags for this Online Resume: VLSI, ASIC, SOC, FPGA, VHDL and Verilog, Design and Verification
Engineer - 1 Years of Experience - Near 97229
Seeking an IC/CAD/SoC physical design engineering position QUALIFICATION * 16-year experiences in high-speed, low-power, billion-transistor, deep sub-micron CPU design * 3-yearexperience in sophisticated SoC design * Taped out 7 Intel CPU chips and 2 Broadcom communication chips
Tags for this Online Resume: Intel Co., Noise, Perl Programming Language, Sub-micron, Automation, Layout, Reliability, CAD flow, EDA tools, System engineering, synthesis, IRdrop/EM/ESD, STA, PnR, RC Extraction, CTS, Low power
Electronics Engineer - 20 Years of Experience - Near 90305
Summary Principal ASIC Design Engineer with more than 20+ years ASIC design and verification experience including completion of more than 10 project cycles from concept through successful first-pass production release of silicon. Experience includes all aspects of ASIC design and verification, including writing micro-architecture specifications, Block Level and Subsystem design and verification, Timing closure, FPGA design ...
Tags for this Online Resume: Asic, ASIC Design, ARM, ASIC Design and Verification, Associate in Risk Management, Chip Design, Coding, Debugging, Deep Sub-Micron, Digital Design, FPGA
