• Programmed Teradyne testers for Digital Signal Processor (DSP) integrated circuits in a New Product Introduction (NPI) environment.
• Tested devices using HVST, DDR, SRIO, Bitmaps, Data Retention, and DFT techniques of BIST and SCAN.
• Generated test software for wafer probe in Taiwan, Singapore, Japan, Malaysia, and China.
• Supported NPI product engineering from product definition through validation and launch.
• Coordi...
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engineering, test, webmaster, instructor, technician, semiconductor
Motivated test engineering expert seeking a position involving next generation semiconductor test solutions. Key Accomplishments Led solution development as the central hub between global customers and internal design teams to determine the right feature set for the new automatic test equipment (ATE) line, resulting in the highest performing sales in the company's history. Managed cross functional teams involving developmen...
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Microprocessors, Architect, Electronics, Electrical Engineering, Mechanical Engineering, SoC, System design, Troubleshooting, CMOS, Manufacturing, Image sensor, ATE, Semiconductor, Test, Memory, Verification, DFT, BIST
EXPERIENCE SUMMARY: * Overall experience of over 17 years in ASIC Design * Physical layout of standard cell blocks * Test development for silicon on Agilent 93K tester. * Chip route engineer for multiple ASIC designs * Custom layout of digital logic for DDR3 interface. * Memory BIST insertions and verification * Chip level floorplan implementation for multiple ASIC designs * Technical Lead for multiple ASIC designs
Tags for this Online Resume:
Asic, ASIC Design, Cadence, Compiler, EDI, Electronic Data Interchange, Layout, Perl Programming Language, Physical Layouts
