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Online Resumes with "Virtuoso"



Electrical Engineer - 3 Years of Experience

Electrical Engineering Masters student at Arizona State University with 3 years of significant experience in High Speed Electronic Board Design and Development. Seeking opportunities to utilize skills in the area of Product Design.

Tags for this Online Resume: Cadence Orcad, Cadence Virtuoso , Modelsim, Matlab, Cadence Encounter, Board Design, High Speed Circuit Design

Featured Profile

Electrical Engineer - 3 Years of Experience - Near 94086

I am extremely passionate about pursuing a career in the semiconductor industry. I am a hardworking and a goal oriented person with a can do attitude.

Ideal Companies: Intel, Qualcomm, Apple,

Tags for this Online Resume: IC design, IC verification, Design for Test, ASIC/FPGA design, C, Python, SystemVerilog

Product Design Engineer - 1 Years of Experience - Near 79415

Murari Garipally 3102, 4th Street| Lubbock, TX, 79415 | murari.garipally@gmail.com | 682-226-3117 Date: 02/17/2015 Dear Sir/Madam, I am a Master’s student at Texas Tech University in Electrical Engineering with my concentration in RF Design and Testing. My course work related to the field of RF includes Analog IC design, Microwave Solid State Circuits, Radar Engineering, Antenna and radiating Systems. I...

Electronics Engineer - 12 Years of Experience - Near 95132

Cadence: VXL,Virtuoso, Opus; Synopsys: Cosmos LE; Mentor Graphics: IC Station, IC studio; Tanner L-Edit; ICED-32 Layout Editor.

Tags for this Online Resume: Analog RFIC Mixed Signal Layout Engineer, Cadence VXL Calibre Hercules Assura, PLL, VCO, DSP, ADC/DAC, RFIC, ASIC, CMOS BICMOS DMOS, TSMC 10/4/16/20/28/40/45/90/130, VXL,Virtuoso, VXL,Virtuoso Synopsys, VXL,Virtuoso Synopsys Tanner L-Edit, VXL,Virtuoso Synopsys Tanner L-Edit ICED-32, VXL, IC studio, Virtuoso Synopsys Tanner L-Edit ICED-32

RF Engineer - 2 Years of Experience

Tags for this Online Resume: RF Design Engineer, ADS, Virtuoso Cadence, Network Analyzer, Spectral Analyzer, Matlab, Altium, C

Environmental Scientist - 12 Years of Experience - Near 57005

Tags for this Online Resume: Management, Quality Assurance, Software, Test, Assessments, Data Management, Database, Database Administration

Computer Hardware Engineer - 20 Years of Experience - Near 97078

Profile Creative problem solver with years experience at physical design and section layout owner. Excellent technical, analytical and communication skills demonstrated by 21 years career at Intel. Proven ability to manage multiple projects in tandem and meet critical deadlines as part of Intel's top ranked design team in Hillsboro, Oregon. Top five strengths are lifelong learner, strategic thinker, focus on detail, goal ac...

Tags for this Online Resume: Autocad, Autodesk AutoCAD, Automation, Business Software, CAD Tools, CadWorks tools, Informix, Inventory, Inventory Control, Manufacturing, Cadence, Xilinx Virtuoso, Sysnposis APR

Electrical Engineer - 3 Years of Experience - Near 77025

SUMMARY: * Knowledge of semiconductor device physics, process technology, and design rules. * Proven ability in hardware Design with Cadence (Virtuoso layout, OrCAD, VIP, Design IP) * Design & Verification with Verilog, system Verilog & OVM/UVM methodologies. * Proficient C, C++, python and MATLAB programming skills & Tools experience with Altera Quartus, Modelsim, Silvaco Virtual Wafer Fab, MATLAB, Proteas, LTspice, LINUX.

Tags for this Online Resume: FPGA, Programming, VERILOG, Asic, C Programming Language, C++ Programming Language, Cadence, Electronics, Embedded Systems, Matlab

Electronics Engineer

SUMMARY Senior physical design engineer with 18 years' experience in various layout styles including custom, cell-based and RLS, with particular expertise in memory compiler design. Extensive experience with 14nm and 10nm processes technologies. Skillful in layout planning, implement, verification and debugging. Experience in: * Layout design CAD tools: GeneSys, Opus, Virtuoso, Hercules, ISS, RV, SURF * Physical verificatio...

Tags for this Online Resume: Compiler, Intel, Intel Microprocessors, Layout, Layout Design, Macro (Predefined Code), Mask, Microprocessors, Noise, Phase Lock Loop (PLL), analog

Engineer - 20 Years of Experience - Near 95051

QUALIFICATIONS * 20+ years Computer Hardware / firmware / circuit design experience * 5+ years management experience in semiconductor library / chip integration area * Automation of SoC chip integration (power grid, decap placement, via generation, dummy metal fill, alignment mark placement) * TSMC 10nm technology experience with colored M1-M3 layers on Virtuoso V6 and ICC (developed def converter between different layer de...

Tags for this Online Resume: Integrate, Circuit Design, Layout, Semiconductors, Cadence, Hardware/Systems, Automation, C Programming Language, Coding, Calibre, Perl, Cadence Skill code, def lef design language

BS Physics | EE Minor | Seeking Entry-Level Position in Semiconductor Industry | San Mateo, CA

Seeking an entry-level position in the semiconductor industry, where I can apply my skills in IC device modeling, fabrication, and circuit analysis.

Tags for this Online Resume: C++, Python, Verilog A, Java, Linux, Windows, TCAD Sentaurus, HSPICE, Cadence Virtuoso, LabVIEW, NI Multisim, Simulink, Mathematica, Matlab, Java Eclipse, IC Device Fabrication, Deivce Modeling, Analog IC Design, Numerical Analysis, Quantum Mechanics, Data Structure, Object Oriented Programming

Electrical Engineer - Graduated 2017 - Near 95051

Actively seeking an opportunity in the field of VLSI where I can put my engineering skills into practice & develop myself along with the development of the organization. ACADEMICS: * MS in Electrical Engineering GPA: 3.350 San Jose State University, San Jose, CA August 2015 - May 2017 Related Coursework: Logic Design for DSP/Communication, Advanced Logic Design, Probability- Random Variables and Stochastic Process, Advanced...

Tags for this Online Resume: Automation, Documentation, Failure Analysis, Troubleshooting, VLSI, SoC Design, UVM, Cadence, RTL design/ Verification, ASIC, Verilog, SystemVerilog, VHDL, Python