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Online Resumes with "Cadence Tools"
Electrical engineer with knowledge of Cadence tools
Tags for this Online Resume: ASIC, Cadence, NC-sim, C++, Oracle, Entry level engineer
ASIC Design Engineer
Seeking a full time engineering opportunity to work on challenging projects in VLSI/Digital Design and related fields.
Ideal Companies: Companies related to semiconductors, telecommunications, computer hardware, electronics
Tags for this Online Resume: Verilog, VHDL, C, MATLAB, Digital Design, Perl, Tcl, Cadence Tools, Synopsys tools, Mentor Graphics tools, RTL Design, Verification
I.C. layout engineering
I.C. Mask layout designer
Tags for this Online Resume: I.C. layout with Cadence tool, AUTOCAD, Linux/Unix, Windows office, excel, access
Engineer - 6 Years of Experience
SUMMARY OF QUALIFICATION -. Power IC engineer for 2years -. Analog IC engineer for 19 months - LCD driver IC design -. Analog IC engineer for 5 months - OLED driver IC design -. Cadence tool: HSPICE for circuit design -. Experience in layout by using Composer -. Understanding about the power electronics: Buck, Boost, Buck-boost, etc
Tags for this Online Resume: Power (Os Enhancemnt Tool, Analog Circuit Design, Cadence, Circuit Design, Composer, Electronics, Integrated Circuit Design, Layout, Microsoft Excel, Microsoft Office
Electronics Engineer - 19 Years of Experience - Near 90501
SUMMARY: Mixed Signal IC Design Engineering position in which can apply the background in design and cad tool knowledge to design ADC DAC and various Mixed Signal ICs using state of art Bipolar and CMOS technologies with proven more than 15 years of related experience. AREAS OF EXPERTISE: A/D and D/A Converter Design Analog IC Design Mixed Signal IC Design Custom/Semi-Custom IC Design BiCMOS Processing, JAZZ, IBM, NG, Maxim...
Tags for this Online Resume: Spectre, Spice, Analog, Mixed Signal, ADC, DAC, Aerospace, Aerospace Systems, Noise, A/D Converter, Northrop Grumman, Raytheon, Connexant, electrical enigneering, project engineer CMOS Bipolar BiCMOS
Electrical Engineer - Graduated 2017 - Near 95051
Actively seeking an opportunity in the field of VLSI where I can put my engineering skills into practice & develop myself along with the development of the organization. ACADEMICS: * MS in Electrical Engineering GPA: 3.350 San Jose State University, San Jose, CA August 2015 - May 2017 Related Coursework: Logic Design for DSP/Communication, Advanced Logic Design, Probability- Random Variables and Stochastic Process, Advanced...
Tags for this Online Resume: Automation, Documentation, Failure Analysis, Troubleshooting, VLSI, SoC Design, UVM, Cadence, RTL design/ Verification, ASIC, Verilog, SystemVerilog, VHDL, Python
Electrical Engineer
To obtain a full-time position to apply and further my knowledge of digital signal processing, circuit and FPGA area. Experienced in MATLAB, Verilog HDL, Quartus II, FPGA, Cadence Tool, PCB, Protues ARES, LabVIEW, Eclipse, Java, C, etc.
Tags for this Online Resume: Adc (Advance Data Comm), C Programming Language, Coding, Debugging, Digital Signal Processing, Engineering, Fabrication, Image Processing, Information Technology, Management
Electronics Engineer - 12 Years of Experience - Near 94041
Profile: Experience in * Fullchip backend design integration, management, * Chip level edit, floor plaining and tapeout. * Analog and digital customer layout. * I/O PAD, memory full custom layout design including floor planning. * Has the certificate of the Cadence First and SOC Encounter * Using Laker tool generate the sub block automatically, and it's DRC and LVS. * Physical design, LVS, DRC and RC extraction and verifica...
Tags for this Online Resume: Layout, Management, Planning, Tape-out, Asic, Chip Design, Multimedia, CAD Tools, Cadence, Chip Verification
Electronics Engineer - 16 Years of Experience - Near 94041
Profile: Experience in * Fullchip backend design integration, management, * Chip level edit, floor plaining and tapeout. * Analog and digital customer layout. * I/O PAD, memory full custom layout design including floor planning. * Has the certificate of the Cadence First and SOC Encounter * Using Laker tool generate the sub block automatically, and it's DRC and LVS. * Physical design, LVS, DRC and RC extraction and verifica...
Tags for this Online Resume: Layout, Management, Planning, Asic, Chip Design, Multimedia, Tape-out, CAD Tools, Cadence, Chip Verification
Electronics Engineer - 19 Years of Experience - Near 90501-5912
SUMMARY: Mixed Signal IC Design Engineering position in which can apply the background in design and cad tool knowledge to design ADC DAC and various Mixed Signal ICs using state of art Bipolar and CMOS technologies with proven more than 15 years of related experience. AREAS OF EXPERTISE: A/D and D/A Converter Design Analog IC Design Mixed Signal IC Design Custom/Semi-Custom IC Design BiCMOS Processing, JAZZ, IBM, NG, Maxim...
Tags for this Online Resume: A/D Converter, Aerospace, Aerospace Systems, DAC, Noise, Rf, Adc (Advance Data Comm), Analog Design, Coding, Engineering
