Tri-lingual technical marketing engineer for DSP and FPGA related technologies with seven years of direct customer interface experience in the Asia Pacific market.

COMPANY	POSITION HELD	DATES WORKED
(Confidential)	(Confidential)	12/2006 - Present
Xilinx	(Confidential)	5/2004 - 11/2006
Pixim	(Confidential)	6/2003 - 4/2004
Silicon Laboratories	(Confidential)	10/2000 - 2/2003

SCHOOL	MAJOR	YEAR	DEGREE
The Johns Hopkins University	Biomedical Engineering	1993	Bachelor Degree

Highlights:

DSP Algorithm/Theory:Though my work supporting various Xilinx IP cores, I am familiar with the many of the industry-standard DSP algorithms such as:1. Error Correction: Viterbi Decoder, Convolution Encoder, Reed-Solomon En/Decoder2. Communication/Networking: J.83 Annex A/C, B3. Standard DSP Filters: MAC FIR, DA FIR, Polyphase Filters4. Standard Math Functions: Multiplier, Accumulator, CORDIC, Adder/Subtractor, Counter, Comparator5. Memories/Storage Elements: FIFO (synchronous/asynchronous), Block RAM (single/dual-port).6. Fast Fourier TransformAlso, in my current job, I must interpret customer specifications in order to provide optimum design solutions for digital filters using as FPGA few resources as possible. Technical Writing:My experience in technical writing stems from both the time I spent as a graduate student enrolled in the Technical Japanese Program at the University of Washington as well as my more recent work experience as an applications engineer directly supporting customers. The Technical Japanese Program at the U of WA afforded me the opportunity to follow a unique study plan that integrated a conventional masters program in electrical engineering with very detailed studies in technical Japanese language and literature. In addition to translating articles taken from Japanese scientific journals, I devised and presented, in Japanese, weekly seminars covering various research topics in semiconductor and bioengineering technology. By applying both the intuitive and technical skills I gained from my studies, I was able to qualify various infractions committed by a Japanese medical dialysis manufacturer against an American patent holder (Kaneka America vs. Meir Strahilevi) while working on short-term contract for a major intellectual property law firm in Seattle, WA.In my current and past job roles, a large part of my duties entailed writing official solution records and FAQs for common problems encountered when using software tools as well as hardware measurements. This required researching by collecting information on different ways to reproduce the phenomenon or error followed by testing and verification of the solution under the approval of a factory engineer. Furthermore, a solution record and a set of FAQs could become the basis for an application note of which I am currently in the process of writing. The extent to which I have performed editing duties has been limited to issuing change requests on errors on discovered on documentations such as datasheets, errata, solution records etc. Also, I have also undertaken numerous proofreading duties for verifying Japanese-English translations of training material and technical literature.Analysis/Debugging:As part of the process involved with supporting customer issues, my daily tasks involve using system-level development/verification tools to run behavioral as well as timing simulations for debugging HDL code. Often this would also entail creating a custom-made testbench in order to verify changes to design code. It is also necessary for me to use a digital scope and logic analyzer to debug at the hardware/PCB level after having ensured the integrity of the software design. In addition to answering questions regarding electrical specifications for our products, I have assisted customers with layout issues during pre-design evaluation and advising specific design platforms which must be tailored uniquely to ideally fit various types of applications. Finally, ensuring our products’ global compliance to electrical performance, safety, and quality specifications for over 80 different countries in the world is one of the more important and difficult tasks that I undertook for various customers before mass production. In many cases, this involves going into the customer site to analyze the system architecture or trying to reproduce the same error or failure on a different test bench in our own lab in order to solve the problem.Furthermore, I must apply sales-specific strategies in addition to technical acumen in order to secure new design wins. These strategies entail constant updating of technical feedback from customers to the home office, assessing competitive climate through market research, and managing sales-distribution activities through effective communications and technical training. Customer Training/Presentations:I have presented highly technical customer training classes and seminars on techniques for implementing DSP algorithms on FPGAs as well optimizing design resources by using DSP-dedicated slices, FIFO and BRAM architectures of new generation devices in both Japanese and English. Furthermore, I have also conducted introductory training material for newly hired distributor FAEs on EDA tools and DSP technical marketing presentations at internal worldwide FAE conferences in Japan.

Companies I like:

Infineon, Qualcomm, Agilent, Analog Devices, Dolby Labs, Xilinx, Accenture, Bosch, Goldman Sachs

Software Programming: Java(Expert) C(Proficient)
Application Testing
Unit Commitment
Product Development
P&L responsibilities
Presentation
Ecommerce Strategy and digital marketing channels optimization - SEO, SEM, email, affiliates - for high-profile accounts.
Technology Solutions
Sales Support
Software Implementation

• Japanese Korean FPGA DSP applications engineering marketing customer interfacing

Build and test audio processing firmware deliverables and write accompanying software/hardware documentation for audio dual core DSP devices. Interpret customer specifications in order to provide optimum design solutions for digital filters using as FPGA few resources as possible. Presented highly technical customer training classes and seminars on techniques for implementing DSP algorithms on FPGAs as well optimizing design resources by using DSP-dedicated slices, FIFO and BRAM architectures of new generation devices in both Japanese and English.