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Design Engineer
Summary of Qualifications: * Master of Science in Electrical Engineering from NYU-Polytechnic University in Brooklyn, New York * Created and developed a power estimate to create IR and EM correct power rails using Synopsys tools for TSMC flow. * Over 20 years as a physical designer and 10 tape-outs, from netlist to GDS Experienced with leading VLSI libraries: TSMC 90/65/20/28HP/14/10, Global Foundries 28HP and UMC 90 * Timi...
Tags for this Online Resume: Management, Project Management, VLSI, Cadence, Floorplanning, Documentation, Physical Verification, SOC, Tape-out, Compiler
