Graduate student in Electrical Engineering at UCCS seeking a technically oriented position where I can apply my coursework and skills. I am very familiar with Verilog RTL coding and Design Verification using SystemVerilog. I am highly motivated, a team player and have good interpersonal and communication skills.

Highlights:

• Verilog RTL
• VERILOG
• C Programming Language
• Design Compiler
• FPGA
• Information Technology
• Networking
• SystemVerilog
• Entry Level Hardware Electrical Engineer