Summary of Qualifications * Participated in more than 15 IC design projects - Function design and verification for SONET/OTN/SDH, PCI/Sata3/high speed 10G serdes, flash memory, power management IC. - Physical design for SSD controller, SOC mobile phone application processor, digtal radio processor and serdes. * Expertise in large digital analog mixed system verification and debug * Expertise in Perl and TCL language to support automation * Experience variety simulation tools, using C++, systemC, VHDL, Matlab, Verilog, system_verilog, verilog AMS, Spice to design and verify circuit * Proficiency in SYNOPSYS ICC, Astro, Prime-time, Design_conpiler, Magma, StartRCXT Formality physical design tools.

Highlights:

• Asic
• ASIC Design
• VERILOG
• Phase Lock Loop (PLL)
• PLL
• ASIC Design and Verification
• Layout
• SOC