Description
IC Design, Verification, Verilog, System Verilog, Mixed-signal, DC, RC, DFT, Tetramax, Primetime, Formality ET, LEC, Tempus, SPICE/Spectre, AMS, Tcl, Python scripting. 10 U.S. patents.
![Right_template4_bottom](/images/templates/colorful/right_template4_bottom.png?1597775387)
Accomplishments
Highlights:
![Left_template4_bottom](/images/templates/colorful/left_template4_bottom.png?1597775387)
Keywords
![Left_template4_bottom](/images/templates/colorful/left_template4_bottom.png?1597775387)