20+ years of significant IC/ASIC Design experience in Custom, ASIC and Mixed Signal Environments with Networking, Connectivity and Storage product lines. 20+ years of strong "results oriented" management record and customer driven product development focus. Proven organizational Leadership with strong fiscal discipline. Managed multiple teams with a track record of on-time deliverables. Excellent Interpersonal, Presentation and Negotiation skills. Strong Record of completing Issues related to DFY and DFM and Power signoff in 7nm 16nm 28nm technology nodes. Strong experience in building teams with tangible deliverables. Good understanding of both RTL design, Verification, Chip Implementation and Physical verification domains. Extensive experience with Synopsys, Cadence, and Mentor Graphics flows and management of EDA and IP vendors. Managed Foundry relationships with TSMC and UMC and strong links to BE vendors such as GUC and Amkor for Assembly, Test and manufacturing service. Managed IP selection and integration of embedded cores ARM and Xtensa, custom and PCIe Gen4 & Ethernet Serdes, DDR4, LP-DDR4 Proven track record of over 98 successful tapeouts. "Hands-on" technical leader.

Highlights:

• SOC
• Unix
• VERILOG
• VHDL
• ARM
• Foundry
• Phase Lock Loop (PLL)
• PLL
• Software
• Software Development