Experienced with MirraTrac, Westech 572M, stand alone and on-trac DSS Experienced with CMOS Integration, SPC/SQC, JMP, Design Expert. * Product Engineer, TI DM5, Flash Technologies 01/08 - 10/08 * Product owner for 130 and 90nm automotive devices. * Customer support working with planning and quality teams. * Inline yield improvement through process optimization based on product yield correlation. * EOL test program coverage and affectivity improvement. * Moat Defect Focus Team leader 01/08 - 10/08 * CMOS/Analog/Flash technologies, integration and defect improvement through product engineer owner and leadership of front end process groups. * Process Engineer, TI DM5/ CMP Group/ STI CMP 10/05 - 12/07 * Member Group Technical Staff * Lead STI CMP process engineer with sustaining, process improvement and process capability improvement responsibilities. * LBC8 development team member: Enabled the STI loop on TI's first dual plane product with embedded flash. * LBC8 High Voltage Devices - Deep Trench Development: TI's first STI loop process development on deep trench isolation resulting in 6-26% area savings on high voltage device design for STI CMP process. 12/20017 - Present University of Texas at Dallas, Richardson, TX * Visiting Research Scholar, Department of Materials Science and Venture Development Center. 1 07/2009 - Present Ozyegin University, Istanbul, Turkey * Associate Professor, Mechanical Engineering Department * Thin Film/Interface Characterization * Chemical Mechanical Planarization Applications and Slurry Development for W, Cu, Ge, GaN, Ta/TaN and Mn/MnN films. * Particle Science and Technology * Colloids and Surface Chemistry
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