Description
Summary Of Qualifications: 20 years of experience in developing microelectronics packaging, substrates, contactors and interconnects concepts especially the field of 2, 2.5 and 3D microelectronics packaging using electrical engineering, material properties, mechanical engineering and other multidisciplinary engineering principles . Redundant to mentions that this experience includes RF, MEMs, LEDs and other general semiconductor device packaging and architecture, general engineering research, and process development. I am a broadly qualified innovator with a unique talent for developing elegant solutions to problems arising in microelectronics and electro-mechanical engineering research and manufacturing environment. I am particularly interested in the thermomechanical aspects of adjacent structures, including MEMS, sensors packaging, and interconnects, in both rigid and flexible material sets. I have a proven record for turning problems into strong, defensible and profitable solutions and intellectual property. My focus on finding simple, practical solutions has yielded over 70 granted US and international patents in a diverse range of engineering fields. A majority of the provisional patents I filed have led to granted patents, and widely spread technologies. My knowledge of semiconductor and organic devices spans both back and front ends of production, and I am experienced in a wide range of 2D and 3D CAD design software utilities. I have the knowledge and skills to contribute to the design of concepts, prototyping, validation, and their transition to mass manufacturing. My granted patent and proposed concepts and methods, are mainly related to microelectronics devices, packaging structures, contactor and interconnect technologies and their methods of manufacturing. I have managed countless R&D projects from concept to mass manufacturing, both in back end and front end processes. My experience includes working with material and equipment vendors to develop efficient and cost effective materials and equipment for the mass and cost effective manufacturing of newly developed technologies and processes. Skilled In: Strong intellectual property development skills, defensive and strategic patent generation, prior art research and prior art analysis skills. A wide range of CAD drawing software utilities, such as SOLIDWORKS, and its simulation utilities AutoCAD, ACAD inventor, some Pro-E, Maya, 3ds Max, etc. Expert in patent draft drawings, detailed descriptions and initial claims authoring. Thermomechanical stress decoupling solutions and structures. Broad and extensive expertise in flexible and rigid circuit interconnect solutions. Ability to invent and innovate via my out-of-the-box thinking skills. Enhancement of assembly processes, both in terms of cost and quality. Design and architecture of test sockets and contactors. Financial analysis and business development. Experience in Flex and Semiconductor fabrication process. Photo Tool and mechanical design experience. Highly collaborative. Guiding ideas from the conceptual level to mass manufacturing Lasers, Plasma (DIRE), Thermo-Compression bonding, etc, solder attach, wafer level packaging, and countless others. My accomplishments include: * I have contributed significantly to the development and enhancement of µBGA and other packaging technologies. I have worked with vendors and Tessera's licensees to develop equipment and infrastructure from the ground up. * I have also contributed significantly to Tessera's IP by filling well over 100 patents. Moreover, I have worked directly in process development and implementation of ideas and concepts with hands-on expertise on a variety of equipment, processes and software tools. * Characterized and developed process using Excimer pulsed lasers for blind and through micro via generation on polymers and epoxies. * Developed and optimized the usage of CO2 lasers for the same purpose and implemented its usage as a cheaper and more efficient alternative to Excimer lasers. * Developed and actively participated in substrate process development and building its infrastructure. * Developed assembly processes for DDR memory packaging, such as die attachment, die-to-interconnect joining and encapsulation process. * Designed mechanical fixtures and tools for injection molding, handling and positioning purposes. * Developed WAVE technology (Wide-area Array Vertical Inter- connect Expansion) process. * Developed and created concepts for packaging equipment and material. * Wafer level substrate architecture and development. * Substrate process design and implementation. * Developed fluxless vacuum solder reflow and device attachment technology. * Single chip and stacked die package design and development. * Trained hundreds of licensees to adapt and understand Tessera's core technologies both for the back and front ends of technology processing. * Worked with equipment manufacturers to create a new generation of equipment for micro-BGA and BGA manufacturing. * Helped to develop the chip scale packaging technology from a concept to a worldwide standard. * Developed a wafer lever assembly process for Nuvotronics PolyStrata mm wave additive coaxial technology. Most of my activities are supplemented with several high profitable patents for Tessera Technologies, where on a majority of them I am the first inventor. 12/2013 COMPONENTZEE LLC. APEX, NC 27523 Founder. Several patents granted related to wafer level and Burn-In probe card contactors.
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