Description
* with 2 cycle latency for ALU & 1 cycle latency with 1 cycle delay for Branch instructions * Developed & integrated components: Issue Queue, Reorder Buffers, Frontend & Backend Register Alias Table, TLB Lookup Virtualized Data Center Master's Research Project with Thesis Proved utilization of computing capacity upto 85% if virtualization is used with VMware's vSphere tools Created network with system nodes having self-intellectuality for selecting routing path * Used greedy logic and game theory approach for assigning intellectuality mechanism
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