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Online Resumes with "DRC LVS"
IC Layout Deigner - 5 years experience - Texas Instruments
Looking for IC Layout Designer position.
Tags for this Online Resume: IC Latout Designer, BiCMOS, mied signal nalog, Cadence VXL, Assura DRC/lvs
Software Engineer - 20 Years of Experience - Near 95124
EXPERIENCE SUMMARY: Proficient C/C++ software development STL, Multi-threading, Tcl, Perl, Linux/Unix/Windows EDA/CAD, Global & Detail & ECO routing, VLSI/ASIC designs DRC/LVS physical layout verification
Tags for this Online Resume: C/C++ Programming Languages, Electronic Design Automation (EDA)
Electronics Engineer - 12 Years of Experience - Near 94041
Profile: Experience in * Fullchip backend design integration, management, * Chip level edit, floor plaining and tapeout. * Analog and digital customer layout. * I/O PAD, memory full custom layout design including floor planning. * Has the certificate of the Cadence First and SOC Encounter * Using Laker tool generate the sub block automatically, and it's DRC and LVS. * Physical design, LVS, DRC and RC extraction and verifica...
Tags for this Online Resume: Layout, Management, Planning, Tape-out, Asic, Chip Design, Multimedia, CAD Tools, Cadence, Chip Verification
Electronics Engineer - 16 Years of Experience - Near 94041
Profile: Experience in * Fullchip backend design integration, management, * Chip level edit, floor plaining and tapeout. * Analog and digital customer layout. * I/O PAD, memory full custom layout design including floor planning. * Has the certificate of the Cadence First and SOC Encounter * Using Laker tool generate the sub block automatically, and it's DRC and LVS. * Physical design, LVS, DRC and RC extraction and verifica...
Tags for this Online Resume: Layout, Management, Planning, Asic, Chip Design, Multimedia, Tape-out, CAD Tools, Cadence, Chip Verification
