Description
PCB layout designer with over 20 years experience laying out high speed, high density, tightly constrained, digital and analog printed circuit boards with highly restricted schedule requirements. • Expert user of the Cadence Allegro through version 16.6 o Proficient at utilizing the Allegro Constraint manager tool to accommodate advanced net timing and signal integrity rules. o Large range of circuit technology experience including, but not limited to; Mother, daughter, line, and interface cards, Backplane, controller, PCI, and Memory boards, PCI express, Optical, DDR4 and Sonet circuitry Power supplies Test fixtures and IC fan-out boards Experienced and comfortable with laying out designs with up to 32 layers. o Extensive experience in footprint library creation and documentation utilizing best yield techniques. o Accustomed to incorporating package to package, testability, and high yield solderability parameters into footprint libraries. • Experience using the Specctra shape based auto-router. • Experience in utilizing the Concept Capture HDL, and Orcad schematic editors and symbol creation tools. • Accustomed to designing PCB's with a high awareness of “Design for Manufacturing, Assembly, and Test” requirements. • Accustomed to leading, teaching and delegating routing efforts to junior layout personnel