Westell Inc Work Values

Daily Duties at Westell Inc:

Lead digital designer of Xilinx FPGAs for ADSL (Asymmetrical Digital Subscriber Line) project. Designed T1 elastic buffer and jitter detection logic, framer, deframer, forward error correction logic, interleaving interface logic using XILINX 4005 FPGAs, XBLOX, XABEL, XACT, WORK view Schematics. Wrote HP-Basic software to generate the 'Cook Pulse' on the HP5182A waveform generator. Used on ADSL for noise impairment testing of the forward error correction and interleaving scheme. Designed ADSL demonstration box interfaced to UNIX based 486 PC via the LAN 2000 Bridge, RS449 (37 pin D-SUB) and RS422 interface

What they like about Westell Inc:

You highly value a work environment built on a formal structure, rules, and regulations. You do not enjoy the unpredictability of shifting priorities and deadlines that upset your routine. You require and enjoy direction, input and accountability as part of your work environment. You have a strong need to participate in making key decisions and feel left out if your superiors or co-workers do not seek your input when making decisions. You thrive on providing good customer service to both internal or external customers, and doing so makes you feel good.

Tags

C, CPLUSPLUS, ASIC, FPGA, DSP, VERILOG, VHDL, SYSTEMVERILOG, UVM, OVM, VMM, UNIX, LINUX, XILINX, ALTERA, ATMEL, MATLAb, SIMULINK, ETHERCAT, ETHERNET, RS232, RS485, COLDFIRE, SONET, VectorCAST, RTOS, PERL, TCL, ShELL, PYTHON, DFT, CodeWarrior, Code Composer, XML, PCB, JTAG, UART, I2C, LVDS, HDSL, SPI, DDR, JIRA, Perforce, UBUNTU, LABView, HTML

Skills

VHDL, Verilog, C, C++, DFT, Python, MATLAB, SIMULINK, Verification, SystemVerilog, EtherCAT, RTOS, DSP, ASIC, FPGA, Code Warrior , Code Composer

These are some of the questions we asked our climbers about their experiences with Westell Inc: