Sen Tech Acoustic Work Values

Daily Duties at Sen Tech Acoustic :

ASIC Design/Verification Engineer (consultant) Responsible for designing ASIC/FPGA to acquire CameraLink™ compliant digital image into the Texas Instrument’s DM642 DSP for tracking and processing military targets. Designed with Xilinx Spartan 3 FPGA VHDL code Xilinx ISE. CameraLink™ LVDS Interface. Added Xilinx Pico blaze, assembler code to interface with ARM embedded processor. Wrote BFM VHDL code for the CameraLink™ and verification test bench.

What they like about Sen Tech Acoustic :

Organizations with strong, centralized leadership are particularly attractive to you. You require a work environment with leadership that aggressively seeks to expand and grow the business and does so in a visible and decisive manner. In general you prefer to work in an environment in which there is a strong link between leadership, its actions, and a strong set of company-wide values.

Tags

C, CPLUSPLUS, ASIC, FPGA, DSP, VERILOG, VHDL, SYSTEMVERILOG, UVM, OVM, VMM, UNIX, LINUX, XILINX, ALTERA, ATMEL, MATLAb, SIMULINK, ETHERCAT, ETHERNET, RS232, RS485, COLDFIRE, SONET, VectorCAST, RTOS, PERL, TCL, ShELL, PYTHON, DFT, CodeWarrior, Code Composer, XML, PCB, JTAG, UART, I2C, LVDS, HDSL, SPI, DDR, JIRA, Perforce, UBUNTU, LABView, HTML

Skills

VHDL, Verilog, C, C++, DFT, Python, MATLAB, SIMULINK, Verification, SystemVerilog, EtherCAT, RTOS, DSP, ASIC, FPGA, Code Warrior , Code Composer

These are some of the questions we asked our climbers about their experiences with Sen Tech Acoustic :