National Semiconductor Work Values

Daily Duties at National Semiconductor:

1> Developed "Look-Ahead MLSE" algorithm. Sub-optimal, low complexity method of improving performance over mere Channel equalization in 100-Base-TX fast-Ethernet receiver. Primary owner of Fixed-point 100-BaseT Ethernet modem c-code. 2> Interface with Hardware Engineers: Simulated and verified algorithms in Matlab (floating-point). Algorithm performance was compared with best achievable limits predicted by theory. Then, wrote C++ fixed point simulation program. This program was reference design for hardware engineers. Worked closely with Verilog/VHDL engineers to ensure faithfulness of hardware implementation to system algorithms. Worked closely with hardware engineers in defining architecture of modem. 3> IEEE 802.11A OFDM based Wireless LAN: Designed key components of receiver-system and Algorithms such as Carrier Frequency Offset PLL, Symbol Timing/Frequency Offset loop and Equalization. Compared floating-point performance with fundamental performance limits. I also understand other portions of design such as RF<=>Baseband <=> RF, AGC and FEC. This sub-project was canceled. 4> IEEE 802.11B DSSS/CCK based Wireless LAN: Designed system algorithms. Simulated performance on Matlab. Key concepts such as Coherent-RAKE, Fast Walsh Transform and Channel sounding and Estimation were understood and algorithms designed for them. The company exited this market. 5> Convolutional Coding for Rayleigh Channels: Designed and verified Algorithm for decoder and novel branch metrics specially tailored for fading channels. This metric yields better performance than Euclidean distance metric. This sub-project was canceled. 1> I designed several aspects of the physical layer modem for 100-Base-TX and 10-Base-TX ethernet over category-5 UTP using an ASIC with only ADCs and DACs as mixed-signal components. 2> I worked on all aspects of this project from system design in floating-point, fixed point quantization/implementation, modeling and matching vectors between VHDL simulation and system simulation, modeling latencies, arithmetic approximations to reduce complexity and etc. Also supported lab testing of this high production volume IC. Helped develop tests suitable for automatic testing machines.

What they like about National Semiconductor:

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