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Online Resumes with "Segate"



Featured Profile

Operations Manager,BS civil Engineering,Top secret clerance

Manufacturing and Engineering…Supply Chain/Logistics…Strategic Planning…Process Redesign…Cost Reductions…Operations ImprovementManufacturing, Operations and Consulting Management with more than twenty years experience. Positions and consulting engagements in a variety of Industries, including hydraulics machinery, solar system equipments, chemical production, steel and General Manufacturing/Industrial products. Diverse, c...

Ideal Companies: SAIC, L3, Eaco, State Dept, DOD, FBI, CIA, BIO companies

Tags for this Online Resume: Innovative, detail-oriented professional with 20 years of experience within the production and manufacturing field

Manager - 18 Years of Experience - Near 11720

Deutschpress Sperry C.S.I. Bradford Segate and United Airlines - Promoted to Engineering Assistant Demonstrated ability in testing new designs and making bread boards to evaluate systems

Tags for this Online Resume: Outside Sales, Pricing, Sales, Troubleshooting, Engineering, Electronics, Inside Sales, Integrate, Integrated Systems, Leadership

Featured Profile

ASIC/SoC/FPGA Digital Design and Verification Engineer - 2 Years of Experience in ASIC Design and 1 Year experience in Verification Domain- Near 95825

Seeking Full-Time/Internship in ASIC/SoC Design Verification/Validation/FPGA. Two years hands on Experience in RTL design and 1 year experience in Verification, including RTL Design, Verilog HDL/ System Verilog, UVM, Code Coverage, Static Timing Analysis (STA), Functional Coverage, Assertions.

Ideal Companies: Intel, Synopsys, Xilinx, NXP, ASIC North, Segate, Mentor Graphics, Ericssion, Qlogic, Marvell, Qualcomm, Nvidia, RADIANSYS, EncoreSemi, Cirrus Logic, ARM, IBM, HCL, Amiga Infotech, L&T, CISCO, Synaptics, AMD, Broadcomm, CTG, Ambrella, Micron, Microchip, Cybercoders, OSI Semiconductors, Google, Microsoft, Facebook, Western Digital, Global Foundries, jma wIRELESS

Tags for this Online Resume: C++ Programming Language, Cadence, Coding, Compiler, Cyclic Redundancy Code (CRC), FPGA, Graphic Design, Linux, Matlab, SoC, CDC, UVM, Code Coverage, Functional Coverage, System Verilog Assertions (SVA), RTL, CMOS, System Verilog, Self checking, Constrained random teatbench, Direct Testbench, Xilinx Spartan 3E FPGA, PERL/ tcl, : Linux, Unix, Windows, Mac, DVS Protocol, MESI Protocol, UART, SPI, DDR, PCI, PCIe(Begineer), Concept of Pipeline and Hazards, Addressing Mode, Cache, Cache Mapping, Virtual Memory, Paging, DMA, ASIC, Synopsys VCS, QuestaSim, ModelSim Simulator Mentor Graphics, Cadence Virtuoso, Design Compiler, Cadence Pspice, Xilinx ISE, Simulink, EDA Playground, C++, Object Oriented Programming, LVS, DRC